|Taught under open university|
Duration of Course:
Date of examination:
Type of assessment:
Not applicable together with:
General course objectives:
To enable the students to understand the basis of MOS technology, including the MOS field effect transistor, and to choose a proper production technology with due consideration of technical and economical terms. To provide the students with complete understanding of the design process for digital systems. To enable students to a comprehensive design space exploration based on models evaluation. To provide techniques and strategies aiming at both low power and high speed design.
To understand design tradeoffs and different design approaches for different technologies: ASICs, FPGAs, and SoCs.
|A student who has met the objectives of the course will be able to:|
- Describe and explain the basis of MOS technology, including the MOS field effect transistor
- Describe and explain basic methods and conditions in digital integrated circuit design
- Describe combinational and sequential digital systems and list their properties and characteristics (timing, area, power dissipation)
- Explain, construct and analyze parts of a digital system, including interconnections, with due consideration of technical and economical terms
- Illustrate the main tasks to be performed in the design of a digital system: simulation, logic synthesis and place-and-route
- Apply suitable techniques to design of systems for high-speed and low-power
- Design a digital system, or part of it, based on given specifications and the methods learned
- Analyze the system designed, compare the results with some reference design and evaluate system's performance
Overview on MOS technology (masks, design rules and electrical parameters) and basic components of MOS circuits (MOSFETs, resistors, capacitors, switches).
Timing and power dissipation of combinational and sequential components.
Design flow: levels of abstraction, design flow for ASICs.
Design tasks: simulation, synthesys, place&route.
Design for low-power: high-level, RT-level and gate-level techniques.
Memory families (static, dynamic, flash).
System level issues: clock distribution, packaging, signal integrity.
Green challenge participation:
This course gives the student an opportunity to prepare a project that may participate in DTU's Study Conference on sustainability, climate technology, and the environment (GRØN DYST). More information
|, 322, 219, (+45) 4525 3725,
, 322, 217, (+45) 4525 3753,
|02 Department of Informatics and Mathematical Modeling|
Registration Sign up:
VLSI: Very-large-scale integration
April 25, 2012|
See course in DTU Course base